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| publication number s71ns-j-00 revision a amendment 0 issue date march 17, 2005 s71ns128jc0 based mcp stacked multi-chip product (mcp) 128 megabit (8m x 16 bit) cmos 1.8 volt-only simultaneous read/write, burst-mode multi-plexed flash memory with 64megabit (4m x 16-bit) cellularram advance information data sheet ! " # $% $& % ' ( publication number s71ns-j-00 revision a amendment 0 issue date march 17, 2005 general description )*'+, - +% -% . ( /0'+, 1"- 1"- & + $ distinctive characteristics !"#!$%# & ' %()*+,,)* 2 0034*503 - . 2 6 $7/389:38 s71ns128jc0 based mcp stacked multi-chip product (mcp) 128 megabit (8m x 16 bit) cmos 1.8 volt-only simultaneous read/write, burst-mode multi-plexed flash memory with 64 megabit (4m x 16-bit) cellularram advance information device flash density psram density 128 mb 64 mb )*'*/:,5 2 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information notice on data sheet designations " # % $ + $; $ $ # $ $ < + / 0 . " # + $ # $ $ + " # . = + > . % $ ; $ $ ; % 4 + % . = % ; $ ; ; $ ; + > . " # + $% $& % $ $ $ "! % 12 2 .3 6 4 $ % ' $ $ $ $? #( + . = + ; 4 @ $ $ > a "-& b march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 3 advance information contents s71ns128jc0 based mcp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 product selector guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 ordering information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 input/output descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4 mcp block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5 connection diagrams/physical dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.1 special handling instructions for fbga pa ckages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.2 connection diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.2.1 cellularram based pinout, 60-ball, vfbga. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.2.2 look ahead connection diagram 60-ball x16 mux nor flash + x16 mux psram on shared bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.3 physical dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.3.1 nla06060-ball vfbga . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 s29ns128j/s29ns064j/s29ns032j/ s29ns016j . . . . . . . . . . . . . . . . . . . . . 16 6 product selector guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8 block diagram of simultaneous operation circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9 device bus operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 9.1 requirements for asynchronous read oper ation (non-burst) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 9.2 requirements for synchronous (burst) read operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 9.2.1 continuous burst . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 9.2.2 8-, 16-, and 32-word linear burst with wrap around . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 9.2.3 8-, 16-, and 32-word linear burst without wrap around . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 9.3 programmable wait state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 9.3.1 handshaking feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 9.4 simultaneous read/write operations with zero latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 9.5 writing commands/command sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 9.5.2 accelerated program operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 9.5.3 autoselect functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 9.6 standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 9.7 automatic sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 9.8 reset#: hardware reset input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 9.8.4 v cc power-up and power-down sequencing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 9.9 output disable mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 9.10 hardware data protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 9.11 wp# boot sector protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 9.11.5 low vcc write inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 9.11.6 write pulse glitch protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 9.11.7 logical inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 10 common flash memory interface (cfi) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 10.1 command definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 10.2 reading array data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 10.3 set configuration register command seque nce . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 10.3.1 handshaking feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 10.4 sector lock/unlock command sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 10.5 reset command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 10.6 autoselect command sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 10.7 program command sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 10.7.2 unlock bypass command sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 10.8 chip erase command sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 10.9 sector erase command sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 10.9.1 accelerated sector group erase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 4 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information 10.10 erase suspend/erase resume commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 11 write operation status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 11.1 dq7: data# polling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 11.2 rdy: ready . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 11.3 dq6: toggle bit i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 11.4 dq2: toggle bit ii . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 11.5 reading toggle bits dq6/dq2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 11.6 dq5: exceeded timing limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 11.7 dq3: sector erase timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 12 absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 12.1 operating ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 13 dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 13.1 cmos compatible . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 14 test conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 15 key to switching waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 16 switching waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 17 ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 17.1 v cc power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 17.2 clk characterization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 17.3 synchronous/burst read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 17.4 asynchronous read. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 17.5 hardware reset (reset#) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 17.6 erase/program operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 18 erase and programming performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 19 device history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 cellularram type 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 20 functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 21 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 21.1 power-up initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 22 bus operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 22.1 asynchronous mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 22.2 page mode read operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 22.3 burst mode operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 22.4 mixed-mode operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 22.5 wait operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 22.6 lb#/ub# operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 23 low-power operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 23.1 standby mode operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 23.2 temperature compensated refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 23.3 partial array refresh. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 23.4 deep power-down operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 24 configuration registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 24.1 access using cre . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 24.2 software access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 24.3 bus configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 24.3.1 burst length (bcr[2:0]): default = cont inuous burst . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 24.3.2 burst wrap (bcr[3]): default = no wrap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 24.3.3 output impedance (bcr[5]): default = outputs use full dr ive strength. . . . . . . . . . . . . . . . . . . . . . . 79 24.3.4 wait configuration (bcr[8]): default = wait transitions one clock before data valid/invalid . . . . 79 24.3.5 wait polarity (bcr[10]): default = wait active high . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 24.3.6 latency counter (bcr[13:11]): default = three-clock latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 24.3.7 operating mode (bcr[15]): default = asynchronous operatio n. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 24.4 refresh configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81 24.4.1 partial array refresh (rcr[2:0]): defa ult = full array refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81 24.4.2 deep power-down (rcr[4]): default = dpd disabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 5 advance information 24.4.3 temperature compensated refresh (rcr[6:5]): default = +85oc operation . . . . . . . . . . . . . . . . . . . 82 24.4.4 page mode operation (rcr[7]): defaul t = disabled. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 25 absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .83 26 dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 27 ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 27.1 timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 28 revisions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 6 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information ta b l e s /* -% ? *5 c* # d( ** 0* e ( // 0/ e " f /c *5* &#a # /: *5/ # /: *5c f /0 *5g % ? + !4 a /0 *53 " $/0'*/:, c5 *5h " $/0'5hg, c/ *5) " $/0'5c/, cc *5: " $/0'5*h, cc *50 e - cg *5*5 6 @ c3 *5** " # ch *5*/ " ! f $ /0'*/:, c0 *5*c " ! f $/0'5hg, c0 *5*g " ! f $/0'5c/, c0 *5*3 " ! f $ /0'5*h, c0 *5*h g/ *** ah a/# gh **/ 6 ( g: *g* 3* /5* hg /5/ e ( 2" - h3 /5c e ( 2e - h3 /g* e 1 )) /g/ ; e ): /gc ? :5 /gg 1 1 - :* /g3 hg- " % %"1 11igjk* :* /h* ! ( :g /h/ -4 " %"1 1 :g /hc % + :3 /)* :h /)/ ( :h /)c " 1 1 ; :) /)g e 1 1 ; :) /)3 " 6 1 ; :: /)h e 6 1 ; :: /)* # < % :0 march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 7 advance information figures & g* -%e ** & 3* 1"-e % $h5+e$?&ef" */ & 3/ " h5+ 4*h-lm'(1&94*h-lm1"- e *c & 3c % $'"5h52h5+ ?&ef" *g & *5* % ( ch & *5/ ! ( g5 & *** n% " gc & **/ e" g3 & */* -4 ' ( 6 g: & *// -4 % ( 6 g: & *g* 35 & *h* # 6 - 35 & *)* ? % + 3* & *)* o < 3* & *)/ e - 1 hh 3g-@< 3/ & *)c e - 1 g5-@< 3c & *)g " - 1 3g & *)3 1 3g & *)h % ( 33 & *)) d ! ( 3h & *): " l e% 3h & *)0 n% ! " 3) & *)*5 e ! " 3) & *)** :+$*h+$ c/+6 e " 6" 3: & *)*/ e 3: & *)*c # " c! " e 30 & *)*g !4 !4 ?" 1 6 l 30 & *)*3 e ++e 1 d6 h5 & /5* & e hc & /** % +l# < h3 & //* 1 ( "?n hh & /// 6 ( "?n hh & //c % - 1 ( "?n h) & //g e - 1 g+ h: & //3 e - 6 g+ h0 & //h 6 6 h0 & //) 1 1 ( )5 & //: 1 6 ( )* & /g* 1 61#! " - & 1!""11"p( )c & /g/ 1 61#! - & 1!""11"p( )g & /gc 1 )3 & /gg 1 1 )3 & /g3 6 e1i:jk5 ): & /gh 6 e1i:jk* ): & /g) 6 e ( )0 & /g: ? # $'1 )0 & /h* 1 # 1 :g & /)* "# d( 1 6 :3 & /)/ ( :3 & /)c # < % :: & /)g " 1 :: & /)3 " 1 l "?n :0 & /)h % - 1 05 & /)) +" e 1 ( 2? 0* 8 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information & /): & + e 1 ( 2? 0/ & /)0 & +6e 1 ( endlen 0c & /)*5 1 6 ( 0g & /)** e 1 ( e1i:jk5! ++1 03 & /)*/ !n+ " 6 0h & /)*c endlen+ " 6 0) & /)*g 6!n+ " 6 0: & /)*3 " 6 l "?n 00 & /)*h e 6 ( *55 & /)*) e 6 ( e1i:jk5! ++1 *5* & /)*: e 6 & e 1 *5/ & /)*0 " 6 & e 1 *5c & /)/5 " 6 "?n & ee 1 *5g & /)/* e 1 & " 6 6!n+ *53 & /)// e 1 & " 6 l "?n *5h & /)/c " 6 & " 1 2"?n *5) & /)/g " 6 & " 1 *5: march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 9 advance information 1 product selector guide device model numbers psram density flash speed psram speed (mhz) psram (cellular ram) supplier package )*'*/:,5 ?' hg- )5 dhh-@< )5 dhh-@< 1"-/ '"5h5 0034*503 ?% )5 d3g-@< )5 d3g-@< 10 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information 2 ordering information . # . ? s71ns 128 j c 0 bf w v p 0 5k / k )+ 1 c k *c+ 1 /' ' . %k/ k 1"-/$)5 $3g-@< 'k/ k 1"-/$)5 $hh-@< ? k */ $0034*503$h5+ ?&ef" '"5h5 . 6 k 6 +/389:38 e& k ? & +% ef" ?&ef" % + % 45 ' ' /2 khg- , k **5 & f 2 */: k */:- 2 . )*' k - +% *:?+ 1 d6 e - - + 4 &- 91"- table 2.1 mcp configurations and valid combinations valid combinations )*'*/:, 5 e& 6 ? %$' march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 11 advance information 3 input/output descriptions c* table 3.1 input/output descriptions symbol description "//7"*h " "a*37"a5 - + 4 " d (!n ( ! " o e 6!n 6 ! ? f ' ' q 1p 1 # e 6"#n 1"- 1p o # $ $ ; o ? # ? #@ "?n " ? # k $ q $ @k &+1n @ k &+6%n @ "? # $ ? #@ &+" " "? @@ $ q "? # $ ? #@ 1+!*n + 1"- &*+!n + &*" oe - 1+1! 1 ! 1"- & 1"- &+? &*:?+ 1+? 1"-% 1+len l e 1"- 1+en e 1"- 'l 'l 12 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information 4 mcp block diagram ! !! " figure 4.1 mcp block diagram a22 a22 f-rst# rst# a15 ? a0 adq15 ? adq 0 dq15 ? dq0 f-acc acc clk clk f-wp# wp# rdy f-rdy/r-wait f-ce# ce# f-oe# oe# f-we# we# amax ? a16 a21 ? a16 avd# avd# v cc v cc f-vss v ss v ccq v ccq r-ub# ub# a15 ? a0 dq15 ? dq0 r-lb# lb# clk wait r-ce1# ce# oe# we# a21 ? a16 avd# r-cre cre v cc v ss v ccq mux flash memory ns128j psram memory 64 mb cellularram2 ' * ' / march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 13 advance information 5 connection diagrams/physical dimensions #d( )*'+, 5.1 special handling instruc tions for fbga packages ; &- &ef" & &ef" 4 + d 4 *358 5.2 connection diagrams %5! /& +,67& +# &8/ # $" figure 5.1 cellularram based pinout, 60-ball, vfbga mcp flash-only addresses shared addresses shared ad pins )*'*/:,5 "// "/*7"*h "a*37"a5 p1 nc flash/ram shared only flash only legend ram only no connect (distance between outer nc balls is 2x pitch) do not use m3 nc m16 nc p18 nc c16 nc a18 nc c3 nc a1 nc f5 f8 f7 f9 f10 f11 f12 f6 g5 g8 g7 g9 g10 g11 g12 g6 g13 g14 h5 h8 h7 h9 h10 h11 h12 h6 h13 h14 j5 j8 j7 j9 j10 j11 j12 j6 j13 j14 k5 k6 k13 k14 e5 e9 e13 nc dnu r-lb# r-ub# dnu nc f-rdy/ r-wait a21 v ss clk v cc f-acc a19 f13 a17 a22 we# v ccq a16 a20 avd# dnu f-rst# f-wp# a18 f-ce# v ssq v ss a/dq7 a/dq6 a/dq13 a/dq12 a/dq3 a/dq2 a/dq9 a/dq8 oe# a/dq15 a/dq14 v ssq a/dq5 a/dq4 a/dq11 a/dq10 v ccq a/dq1 a/dq0 nc dnu r-ce# r-cre dnu nc e6 e10 e14 f14 k9 k10 h5+ & +% ef" 1"-+e % ? $e& 14 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information %55 9/ 2 . ,67 :!,;<- = :!,;<' /' & figure 5.2 look ahead connection diagram 60-ball x16 mux nor flash + x16 mux psram on shared bus p1 nc flash/ram shared only flash only legend ram only no connect (distance betwee n outer nc balls is 2x pitch) do not use m3 nc m16 nc p18 nc c16 nc a18 nc c3 nc a1 nc f5 f8 f7 f9 f10 f11 f12 f6 g5 g8 g7 g9 g10 g11 g12 g6 g13 g14 h5 h8 h7 h9 h10 h11 h12 h6 h13 h14 j5 j8 j7 j9 j10 j11 j12 j6 j13 j14 k5 k6 k13 k14 e5 e9 e13 nc dnu r-lb# r-ub# dnu nc f-rdy/ r-wait a21 v ss clk v cc f-acc a19 f13 a17 a22 we# v ccq a16 a20 avd# a23 f-rst# f-wp# a18 f-ce# v ssq v ss a/dq7 a/dq6 a/dq13 a/dq12 a/dq3 a/dq2 a/dq9 a/dq8 oe# a/dq15 a/dq14 v ssq a/dq5 a/dq4 a/dq11 a/dq10 v ccq a/dq1 a/dq0 nc dnu r-ce# r-cre dnu nc e6 e10 e14 f14 k9 k10 march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 15 advance information 5.3 physical dimensions %>! 9/6,64,67 # &8/ figure 5.3 2. +9/6,64,67 # &8/ 3483 \ 16-038.22 \ 3.11.5 package nla 060 jedec n/a d x e 10.95 mm x 9.95 mm package symbol min nom max note a --- --- 1.20 profile a1 0.20 --- --- ball height a2 0.85 --- 0.97 body thickness d 10.95 bsc. body size e 9.95 bsc. body size d1 6.50 bsc. matrix footprint e1 8.50 bsc. matrix footprint md 14 matrix size d direction me 18 matrix size e direction n 60 ball count ?b 0.25 0.30 0.35 ball diameter ee 0.50 bsc. ball pitch ed 0.50 bsc ball pitch sd / se 0.25 bsc. solder ball placement depopulated solder balls notes: 1. dimensioning and tolerancing methods per asme y14.5m-1994. 2. all dimensions are in millimeters. 3. ball position designation per jep95, section 4.3, spp-010. 4. e represents the solder ball grid pitch. 5. symbol "md" is the ball matrix size in the "d" direction. symbol "me" is the ball matrix size in the "e" direction. n is the number of populted solder ball positions for matrix size md x me. 6 dimension "b" is measured at the maximum ball diameter in a plane parallel to datum c. 7 sd and se are measured with respect to datums a and b and define the position of the center solder ball in the outer row. when there is an odd number of solder balls in the outer row sd or se = 0.000. when there is an even number of solder balls in the outer row, sd or se = e/2 8. "+" indicates the theoretical center of depopulated balls. 9. a1 corner to be identified by chamfer, laser or ink mark, metallized mark indentation or other means. 10. outline and dimensions per customer requirement. a d e (2x) 0.15 c index mark c b 0.15 (2x) 9 top view corner pin a1 b 60x 0.15 m c 0.08 m c ab c c c 6 side view a1 a a2 0.20 0.08 pnml kj hgf edcb 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 7 e1 se a d1 ed 1 ee corner pin a1 7 sd bottom view a2~a17,b1~b18,c1,c2,c4~c15,c17,c18 d1~d18,e1,e2,e3,e4,e7,e8,e11,e12,e15,e16,e17,e18 k1,k2,k3,k4,k7,k8,k11,k12,k15,k16,k17,k18 l1 ~l18,m1,m2,m4~m15,m17,m18,n1~n18,p2~p17 f1,f2,f3,f4,f15,f16,f17,f18,g1,g2,g3,g4,g15,g16,g17,g18 h1,h2,h3,h4,h15,h16,h17,h18,j1,j2,j3,j4,j15,j16,j17,j18 publication number s71ns-j-00 revision a amendment 0 issue date march 17, 2005 this document has not been appr oved. sharing this document with non-spansion employees violat es qs9000/ts16949 requirements. distinctive characteristics '!? + . 1!"!$% 3 : 2 / 0@- 2 "*37"5 4 a*37a5 2 " "?n !n '. @a 2 4 d 2 r . ,,@%()*1 9 b>6 3 2 e **d*c3 2 " h3d)5 2 )*d:)3 & 2 2 :d*hdc/ 2 :d*hdc/ 1 +? + 9 b>6 3 2 e - 1 ./3 " 2 ( .g5 " 2% d! .*3 " 2 .0s" ' / 2 & :o 2 + /0'*/:, $ + /0'5hg, $4+ /0'5c/, $+ /0'5*h, c/o 2 & 4 < ' 2 2 6%n 2 " ? %% k? # ) 2 % 1p ' .. . 0 1 03 ' .. . cd2d(5( 2 e " /0& " /0? !!6. d. / . 2 ! ! 2 ! % 2 e 2 % d ' @ . 2 $ $ $ ) 1 d'de3 2 @ -'. d !. 2 56 s29ns128j/s29ns064j/s29ns032j/ s29ns016j 28 megabit (8 m x 16-bit), 64 megabit (4 m x 16-bit), 32 megabit (2 m x 16-bit), and 16 megabit (1 m x 16 bit), 110 nm cmos 1.8 volt-only simultaneous read/write, burst mode flash memories data sheet advance information march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 17 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. general description /0'*/:,$/0'5hg,$/0'5c/, /0'5*h, */:- $hg- $c/- *h - *:?+ $ 1 d6 $e - & $ < :$c::$h5:$g$*0g$c5g$/$50)$*3/ *$5g:$3)h *h + ? *)*03? $ $ "*/5+? %% + !%1(- . 7/389:38$ ? &ef" simultaneous read/w rite operations with zero latency 1 d6 $ $ < . ! !n $6 ! 6!n $" ? "?n ( ! + (!n & $ ; 1 1p o d ' & / 1 3 '0 / 1 3 / 0 / 1 3 - 9 hh-@< ** )* h3 c5& 3g-@< *c3 :)3 )5 '5$'!5?c & /' & &+f2' g '* g '* g :o hg c/o hc c/o c/- 0h - '5$'6,(c & /' & &+f2' g '* g '* g :o c/ c/o c* c/o *h- g: - '5$'6>5c & /' & &+f2' g '* g '* g :o *h c/o *3 c/o :- /g - '5$'6!,c & /' & &+f2' g '* g '* g :o : c/o ) c/o g- */ - 18 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. cd2d(5( 7 7 .. + 1 & !%1(- a) n% ahda/ " $ ) ? @ .. h + 6 ? # $ a e & $ # ? # $ + 6 $ . . . % march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 19 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. 6 product selector guide . '5$'!5?c+'5$'6,(c+'5$6>5c+5$'6!,c & h ,,)* %()* -4# " $ #" )* :)3 -4e " $ e" ***c3 -4" " $ " h3 )5 -4!n" $ ! -4(!n" $ (! ***c3 20 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. 7 block diagram % input/output buffers x-decoder y-decoder chip enable output enable logic erase voltage generator pgm voltage generator timer v cc detector state control command register v cc v ss we# reset# v pp ce# oe# a/dq15 ? a/dq0 data latch y-gating cell matrix address latch a/dq15 ? a/dq0 a max ?a16 rdy buffer rdy burst state control burst address counter avd# clk a max ?a0 march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 21 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. 8 block diagram of simultaneous operation circuit &' ( %$ )*&')*( ! % v cc v ss v pp bank b address reset# we# ce# avd# dq15?dq0 clk state control & command register bank b x-decoder y-decoder latches and control logic bank a x-decoder y-decoder latches and control logic dq15?dq0 dq15?dq0 dq15?dq0 dq15?dq0 dq15 ? dq0 bank c y-decoder x-decoder latches and control logic bank d y-decoder x-decoder latches and control logic oe# oe# oe# oe# status control a max ?a0 a max ?a0 a max ?a0 a max ?a0 a max ?a0 bank c address bank d address bank a address rdy 22 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. 9 device bus operations ; $ + $ 4 0* $ ; $ +,+ (-.,+ -/,)0 9.1 requirements for asynchronous read operation (non-burst) $ "da*37"da5 " 4 7"*h$ "?n !n ? # 6!n ? #@ ' o ? # "?n $ (!n? # "da*37"da5 & *)g $ " " ; ! !n (! (!n + $ 9.2 requirements for synchronous (burst) read operation *50 . q :+$*h+$ c/+ q :+$*h+$ c/+ $5! & 6 $ o $ "?n % $ #" 1 ; table 9.1 device bus operations - de -de ade / . : i!, /@2g!%i6 d'de 9j /#2e " 1 @ "# #d( @ 6 @ "# #d( @ @d !n @ m m m @#f@r @ @d m @ 1 m m m m @#f@r m m & - e " @ @ "# "# @ " e 4 e @ m e ( @@ e @ m @ m @#f@r @ m e 1!!n mm @ m @#f@r m m e e @ @ m #d( @ march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 23 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. #" o ; e" $ : ,( + 6666> . 7 666666 $ + 5555c! 5555c& hg 1p + $ 5555c& c & hg & *)*/ $ ; $ 555555 $ !n $1!!n $"?n b 0* + # $ $ + # $ " $ $ "?n # ; h-@< $ 1p $55 ?7+!,7+ >57a 9 & a / $ 4 # $ + < ; 0/ " 4 . :+ c0$ c:+c&$ ; c0+c"+ce+c+c+c!+c&+c: + ; $ # $ *h+ c/+ 6 ; $ . 7 ,( k + 1: 3 $5> ?7+!,7+ >57a 9 & a / # $4 :$*h$c/ + $ 6 $ 1p e 6" *50 *5*h :+$*h+$ c/+6e + 6" ta b l e 9 . 2 burst address groups 8 '* 8 / :+ : 5+)$:+&$*5+*)$*:+*& *h+ *h 5+&$*5+*&$/5+/&$c5+c& c/+ c/ 55+*&$/5+c&$g5+3&$h5+)& 24 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. " 4 $:+ e 1 $ c0$ ; c0+c"+ce+c+c+c!+c&+g5$ + g5# $ *h+ c/+ ; $ 1 $*hc/ e $ 4 # 4 hg q 4 1p # $ e # ; h-@< $ 1p 9.3 programmable wait state "?n l $ 4 + ; ; q $ *50 " + "**+"5 333$ "*)+"*/ & $ 1 ; $>! ) 1p ; + 5c3g hh-@< 1p (!n ; + " ; & $ ; $ $ 1 ; " ; 9.4 simultaneous read/write op erations with zero latency " 4 & *)*3 < + + + + + march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 25 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. 9.5 writing commands/command sequences d + ; $ "?n !n? # $ (!n? #@ $ 6!n !n? # $ (!n? #@ ;& ( l e $ ; $ " $ $ ) . e " :o c/o $ e e$$ c/o " ; ; $ ; ; 1 1!!n.@ 1 # $%5 / .- ? %% # ? # $ l e ; + ; ; l e 1 ? # ? %% $%> / # ; $ a)7a5 " & " ; 9.6 standby mode 6 $ # $ $ $ (!n -( !n 1!!n ? t5/? ; ! $ # $ # c 9.7 automatic sleep mode < & " 9h5 !n$6!n$ (!n 6 $ # g 26 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. 9.8 reset#: hardware reset input 1!!n 6 1!!n 1% $ $ $ d 1!!n ; $ 1!!n 6 1!!n ? t5/?$ -( # g #1!!n ? # ? t5/?$ 1!!n " & $ + & #1!!n $ ; 1!"p6 ! " #1!!n + 4 $ 1!"p ! " 1@ 1!!n ? #@ " 1!!n & *)3 $?( # 7 7 'h ? + + ; " 1! + !n? # ; ? ; ( ? $ + 1!!n? #@ 9.9 output disable mode 6 (!n ? #@ $ 9.10 hardware data protection ; ; *5*h . d ; + 6 6%n? # $ 2 "/3) "/3: /0'*/:, 2 "*/0 "*c5 /0'5hg, 2 "h3 "hh /0'5c/, 2 "cc "cg /0'5*h, 6 ? %% ? # $ 9.11 wp# boot sector protection 6%n ; $6%n 6%nk? # ; $g $h + march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 27 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. # l e . / $ l e $ 6%n / # . 6%n h ; # $ b 6%n h ; $ ? + + $ $!!% 9 # a 0 6 ? ? o( $ ? + + d $ ; ? ? o( ? ? o( $!!, a ' 3 (! n$!n6!n $!!" 9 0 6 (!nk? # $!nk? #@ 6!nk? #@ $!n 6!n < (!n 28 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. 10 common flash memo ry interface (cfi) &# &# + $ + + $,!!#+ + $ + + & < 4 + &#a &#a $0:$ 33 &# *5* 7 *5g &#$ &#; &#; $ &# *5* 7 *5g + & $ &# &#% *55$ 66 6 .dd dd " $ + table 10.1 cfi query identification string / 2 2 '5$'!5?c '5$'6,(c '5$'6>5c '5$'6!,c *5 ** */ 553* 553/ 5530 a l ; "## *1 *c *g 555/ 5555 % (!- *3 *h 55g5 5555 " % !4 *) *: 5555 5555 " (!- 55k 4 *0 *" 5555 5555 " " (!-!4 55k 4 ta b l e 1 0 . 2 system interface string / 2 2 '5$'!5?c '5$'6,(c '5$'6>5c '5$'6!,c *e 55*) ? - d )7g.$c75.*55 * 55*0 ? -4 d )7g.$c75.*55 * 5555 ? %% - 55k ? %% 1 g *! 5555 ? %% -4 55k ? %% 1 g! *& 555c d / s /5 5555 - < / s 55k /* 5550 / // 5555 / 55k /c 5553 -4 d / /g 5555 -4 / /3 555g -4 / /h 5555 -4 / 55k march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 29 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. ta b l e 1 0 . 3 device geometry definition / 2 2 '5$'!5?c '5$'6,(c '5$'6>5c '5$'6!,c /) 55*: 55*) 55*h 55*3 < k/ /: /0 555* 5555 & # &# *55 /" /e 5555 5555 -4 + k/ 55k / 555/ ' ! e 1 / /! /& c5 55&! 5555 5555 555* 55)! 5555 5555 555* 55c! 5555 5555 555* 55*! 5555 5555 555* ! e 1 *# &# &# *55 c* c/ cc cg 555c 5555 55g5 5555 ! e 1 /# c3 ch c) c: 5555 5555 5555 5555 ! e 1 c# c0 c" ce c 5555 5555 5555 5555 ! e 1 g# ta b l e 1 0 . 4 primary vendor-specific extended query / 2 2 '5$'!5?c '5$'6,(c '5$'6>5c '5$'6!,c g5 g* g/ 5535 553/ 55g0 a + ; "## 23 gc 55c* -b $"## gg 55cc - $"## g3 5555 " l e*+5 5k1 ; $*k'1 ; 1 ' e)+/ gh 555/ ! 5k' $*k1 ( $/k1 u6 g) 555* % 5k' $mk' g: 5555 l 55k' $5*k g0 5553 % dl 53k/0ed'*/: g" 555 55h5 55c5 55*: ( ' 4 ge 555* e - 55k' $5*k g 5555 % - 55k' $5*kg6% $5/k:6% g 55e3 " " - 55k' $)+g.?$c+5.*55 ? g! 553 " " -4 55k' $)+g.?$c+5.*55 ? g& 555c de e & 555*kd- e $ 555/ke e $5cke 35 5555 % 55k 3) 555g e ( < .mk' 3: 55g5 55/5 55*5 555: e 1 # mk' 30 55g5 55/5 55*5 555: e 1 # mk' 3" 55g5 55/5 55*5 555: e e1 # mk' 3e 55gc 55/c 55*c 555: e "1 # mk' 3 555/ % 55k/c5 $5*k*)5 $5/k *c5 d**5 30 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. ta b l e 1 0 . 5 sector address table, s29ns128j ' ' '* / ' ' '* / ' ' '* / & 2 "5 c/o 555555755)&&& "// c/o 5e555575e)&&& "gc c/o *3:5557*3&&&& "* c/o 55:555755&&&& "/c c/o 5e:55575e&&&& "gg c/o *h55557*h)&&& "/ c/o 5*555575*)&&& "/g c/o 5555575)&&& "g3 c/o *h:5557*h&&&& "c c/o 5*:55575*&&&& "/3 c/o 5:55575&&&& "gh c/o *)55557*))&&& "g c/o 5/555575/)&&& "/h c/o 5555575)&&& "g) c/o *):5557*)&&&& "3 c/o 5/:55575/&&&& "/) c/o 5:55575&&&& "g: c/o *:55557*:)&&& "h c/o 5c555575c)&&& "/: c/o 5!555575!)&&& "g0 c/o *::5557*:&&&& ") c/o 5c:55575c&&&& "/0 c/o 5!:55575!&&&& "35 c/o *055557*0)&&& ": c/o 5g555575g)&&& "c5 c/o 5&555575&)&&& "3* c/o *0:5557*0&&&& "0 c/o 5g:55575g&&&& "c* c/o 5&:55575&&&&& "3/ c/o *"55557*")&&& "*5 c/o 535555753)&&& "c/ c/o *555557*5)&&& "3c c/o *":5557*"&&&& "** c/o 53:555753&&&& "cc c/o *5:5557*5&&&& "3g c/o *e55557*e)&&& "*/ c/o 5h555575h)&&& "cg c/o **55557**)&&& "33 c/o *e:5557*e&&&& "*c c/o 5h:55575h&&&& "c3 c/o **:5557**&&&& "3h c/o *55557*)&&& "*g c/o 5)555575))&&& "ch c/o */55557*/)&&& "3) c/o *:5557*&&&& "*3 c/o 5):55575)&&&& "c) c/o */:5557*/&&&& "3: c/o *55557*)&&& "*h c/o 5:555575:)&&& "c: c/o *c55557*c)&&& "30 c/o *:5557*&&&& "*) c/o 5::55575:&&&& "c0 c/o *c:5557*c&&&& "h5 c/o *!55557*!)&&& "*: c/o 505555750)&&& "g5 c/o *g55557*g)&&& "h* c/o *!:5557*!&&&& "*0 c/o 50:555750&&&& "g* c/o *g:5557*g&&&& "h/ c/o *&55557*&)&&& "/5 c/o 5"555575")&&& "g/ c/o *355557*3)&&& "hc c/o *&:5557*&&&&& "/* c/o 5":55575"&&&& & "hg c/o /555557/5)&&& ":3 c/o /":5557/"&&&& "*5h c/o c355557c3)&&& "h3 c/o /5:5557/5&&&& ":h c/o /e55557/e)&&& "*5) c/o c3:5557c3&&&& "hh c/o /*55557/*)&&& ":) c/o /e:5557/e&&&& "*5: c/o ch55557ch)&&& "h) c/o /*:5557/*&&&& ":: c/o /55557/)&&& "*50 c/o ch:5557ch&&&& "h: c/o //55557//)&&& ":0 c/o /:5557/&&&& "**5 c/o c)55557c))&&& "h0 c/o //:5557//&&&& "05 c/o /55557/)&&& "*** c/o c):5557c)&&&& ")5 c/o /c55557/c)&&& "0* c/o /:5557/&&&& "**/ c/o c:55557c:)&&& ")* c/o /c:5557/c&&&& "0/ c/o /!55557/!)&&& "**c c/o c::5557c:&&&& ")/ c/o /g55557/g)&&& "0c c/o /!:5557/!&&&& "**g c/o c055557c0)&&& ")c c/o /g:5557/g&&&& "0g c/o /&55557/&)&&& "**3 c/o c0:5557c0&&&& ")g c/o /355557/3)&&& "03 c/o /&:5557/&&&&& "**) c/o c":5557c"&&&& ")3 c/o /3:5557/3&&&& "0h c/o c555557c5)&&& "**: c/o ce55557ce)&&& ")h c/o /h55557/h)&&& "0) c/o c5:5557c5&&&& "**0 c/o ce:5557ce&&&& ")) c/o /h:5557/h&&&& "0: c/o c*55557c*)&&& "*/5 c/o c55557c)&&& "): c/o /)55557/))&&& "00 c/o c*:5557c*&&&& "*/* c/o c:5557c&&&& ")0 c/o /):5557/)&&&& "*55 c/o c/55557c/)&&& "*// c/o c55557c)&&& ":5 c/o /:55557/:)&&& "*5* c/o c/:5557c/&&&& "*/c c/o c:5557c&&&& ":* c/o /::5557/:&&&& "*5/ c/o cc55557cc)&&& "*/g c/o c!55557c!)&&& ":/ c/o /055557/0)&&& "*5c c/o cc:5557cc&&&& "*/3 c/o c!:5557c!&&&& ":c c/o /0:5557/0&&&& "*5g c/o cg55557cg)&&& "*/h c/o c&55557c&)&&& ":g c/o /"55557/")&&& "*53 c/o cg:5557cg&&&& "*/) c/o c&:5557c&&&&& march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 31 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. & & "*/: c/o g555557g5)&&& "*35 c/o ge55557ge)&&& "*)* c/o 33:555733&&&& "*/0 c/o g5:5557g5&&&& "*3* c/o ge:5557ge&&&& "*)/ c/o 3h555573h)&&& "*c5 c/o g*55557g*)&&& "*3/ c/o g55557g)&&& "*)c c/o 3h:55573h&&&& "*c* c/o g*:5557g*&&&& "*3c c/o g:5557g&&&& "*)g c/o 3)555573))&&& "*c/ c/o g/55557g/)&&& "*3g c/o g55557g)&&& "*)3 c/o 3):55573)&&&& "*cc c/o g/:5557g/&&&& "*33 c/o g:5557g&&&& "*)h c/o 3:555573:)&&& "*cg c/o g/55557g/)&&& "*3h c/o g!55557g!)&&& "*)) c/o 3::55573:&&&& "*c3 c/o gc:5557gc&&&& "*3) c/o g!:5557g!&&&& "*): c/o 305555730)&&& "*ch c/o gc55557gc)&&& "*3: c/o g&55557g&)&&& "*)0 c/o 30:555730&&&& "*c) c/o gg:5557gg&&&& "*30 c/o g&:5557g&&&&& "*:5 c/o 3"555573")&&& "*c: c/o g355557g3)&&& "*h5 c/o 355555735)&&& "*:* c/o 3":55573"&&&& "*c0 c/o g3:5557g3&&&& "*h* c/o 35:555735&&&& "*:/ c/o 3e555573e)&&& "*g5 c/o gh55557gh)&&& "*h/ c/o 3*555573*)&&& "*:c c/o 3e:55573e&&&& "*g* c/o gh:5557gh&&&& "*hc c/o 3*:55573*&&&& "*:g c/o 3555573)&&& "*g/ c/o g)55557g))&&& "*hg c/o 3/555573/)&&& "*:3 c/o 3:55573&&&& "*gc c/o g):5557g)&&&& "*h3 c/o 3/:55573/&&&& "*:h c/o 3555573)&&& "*gg c/o g:55557g:)&&& "*hh c/o 3c555573c)&&& "*:) c/o 3:55573&&&& "*g3 c/o g::5557g:&&&& "*h) c/o 3c:55573c&&&& "*:: c/o 3!555573!)&&& "*gh c/o g055557g0)&&& "*h: c/o 3g555573g)&&& "*:0 c/o 3!:55573!&&&& "*g) c/o g0:5557g0&&&& "*h0 c/o 3g:55573g&&&& "*05 c/o 3&555573&)&&& "*g: c/o g"55557g")&&& "*)5 c/o 335555733)&&& "*0* c/o 3&:55573&&&&& "*g0 c/o g":5557g"&&&& & / "*0/ c/o h555557h5)&&& "/*3 c/o he:5557he&&&& "/c) c/o )h:5557)h&&&& "*0c c/o h5:5557h5&&&& "/*h c/o h55557h)&&& "/c: c/o ))55557)))&&& "*0g c/o h*55557h*)&&& "/*) c/o h:5557h&&&& "/c0 c/o )):5557))&&&& "*03 c/o h*:5557h*&&&& "/*: c/o h55557h)&&& "/g5 c/o ):55557):)&&& "*0h c/o h/55557h/)&&& "/*0 c/o h:5557h&&&& "/g* c/o )::5557):&&&& "*0) c/o h/:5557h/&&&& "//5 c/o h!55557h!)&&& "/g/ c/o )055557)0)&&& "*0: c/o hc55557hc)&&& "//* c/o h!:5557h!&&&& "/gc c/o )0:5557)0&&&& "*00 c/o hc:5557hc&&&& "/// c/o h&55557h&)&&& "/gg c/o )"55557)")&&& "/55 c/o hg55557hg)&&& "//c c/o h&:5557h&&&&& "/g3 c/o )":5557)"&&&& "/5* c/o hg:5557hg&&&& "//g c/o )555557)5)&&& "/gh c/o )e55557)e)&&& "/5/ c/o h355557h3)&&& "//3 c/o )5:5557)5&&&& "/g) c/o )e:5557)e&&&& "/5c c/o h3:5557h3&&&& "//h c/o )*55557)*)&&& "/g: c/o )55557))&&& "/5g c/o hh55557hh)&&& "//) c/o )*:5557)*&&&& "/g0 c/o ):5557)&&&& "/53 c/o hh:5557hh&&&& "//: c/o )/55557)/)&&& "/35 c/o )55557))&&& "/5h c/o h)55557h))&&& "//0 c/o )/:5557)/&&&& "/3* c/o ):5557)&&&& "/5) c/o h):5557h)&&&& "/c5 c/o )c55557)c)&&& "/3/ c/o )!55557)!)&&& "/5: c/o h:55557h:)&&& "/c* c/o )c:5557)c&&&& "/3c c/o )!:5557)!&&&& "/50 c/o h::5557h:&&&& "/c/ c/o )g55557)g)&&& "/3g c/o )&55557)&)&&& "/*5 c/o h055557h0)&&& "/cc c/o )g:5557)g&&&& "/33 :o )&:5557)&0&&& "/** c/o h0:5557h0&&&& "/cg c/o )355557)3)&&& "/3h :o )&"5557)&e&&& "/*/ c/o h"55557h")&&& "/c3 c/o )3:5557)3&&&& "/3) :o )&5557)&&&& "/*c c/o h":5557h"&&&& "/ch c/o )h55557)h)&&& "/3: :o )&!5557)&&&&& "/*g c/o he55557he)&&& table 10.5 sector address table, s29ns128j (continued) ' ' '* / ' ' '* / ' ' '* / 32 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. ta b l e 1 0 . 6 sector address table, s29ns064j ' ' '* / ' ' '* / ' ' '* / & 2 "5 c/o 555555755)&&& "** c/o 53:555753&&&& "// c/o 5e555575e)&&& "* c/o 55:555755&&&& "*/ c/o 5h555575h)&&& "/c c/o 5e:55575e&&&& "/ c/o 5*555575*)&&& "*c c/o 5h:55575h&&&& "/g c/o 5555575)&&& "c c/o 5*:55575*&&&& "*g c/o 5)555575))&&& "/3 c/o 5:55575&&&& "g c/o 5/555575/)&&& "*3 c/o 5):55575)&&&& "/h c/o 5555575)&&& "3 c/o 5/:55575/&&&& "*h c/o 5:555575:)&&& "/) c/o 5:55575&&&& "h c/o 5c555575c)&&& "*) c/o 5::55575:&&&& "/: c/o 5!555575!)&&& ") c/o 5c:55575c&&&& "*: c/o 505555750)&&& "/0 c/o 5!:55575!&&&& ": c/o 5g555575g)&&& "*0 c/o 50:555750&&&& "c5 c/o 5&555575&)&&& "0 c/o 5g:55575g&&&& "/5 c/o 5"555575")&&& "c* c/o 5&:55575&&&&& "*5 c/o 535555753)&&& "/* c/o 5":55575"&&&& & "c/ c/o *555557*5)&&& "gc c/o *3:5557*3&&&& "3g c/o *e55557*e)&&& "cc c/o *5:5557*5&&&& "gg c/o *h55557*h)&&& "33 c/o *e:5557*e&&&& "cg c/o **55557**)&&& "g3 c/o *h:5557*h&&&& "3h c/o *55557*)&&& "c3 c/o **:5557**&&&& "gh c/o *)55557*))&&& "3) c/o *:5557*&&&& "ch c/o */55557*/)&&& "g) c/o *):5557*)&&&& "3: c/o *55557*)&&& "c) c/o */:5557*/&&&& "g: c/o *:55557*:)&&& "30 c/o *:5557*&&&& "c: c/o *c55557*c)&&& "g0 c/o *::5557*:&&&& "h5 c/o *!55557*!)&&& "c0 c/o *c:5557*c&&&& "35 c/o *055557*0)&&& "h* c/o *!:5557*!&&&& "g5 c/o *g55557*g)&&& "3* c/o *0:5557*0&&&& "h/ c/o *&55557*&)&&& "g* c/o *g:5557*g&&&& "3/ c/o *"55557*")&&& "hc c/o *&:5557*&&&&& "g/ c/o *355557*3)&&& "3c c/o *":5557*"&&&& & & "hg c/o /555557/5)&&& ")3 c/o /3:5557/3&&&& ":h c/o /e55557/e)&&& "h3 c/o /5:5557/5&&&& ")h c/o /h55557/h)&&& ":) c/o /e:5557/e&&&& "hh c/o /*55557/*)&&& ")) c/o /h:5557/h&&&& ":: c/o /55557/)&&& "h) c/o /*:5557/*&&&& "): c/o /)55557/))&&& ":0 c/o /:5557/&&&& "h: c/o //55557//)&&& ")0 c/o /):5557/)&&&& "05 c/o /55557/)&&& "h0 c/o //:5557//&&&& ":5 c/o /:55557/:)&&& "0* c/o /:5557/&&&& ")5 c/o /c55557/c)&&& ":* c/o /::5557/:&&&& "0/ c/o /!55557/!)&&& ")* c/o /c:5557/c&&&& ":/ c/o /055557/0)&&& "0c c/o /!:5557/!&&&& ")/ c/o /g55557/g)&&& ":c c/o /0:5557/0&&&& "0g c/o /&55557/&)&&& ")c c/o /g:5557/g&&&& ":g c/o /"55557/")&&& "03 c/o /&:5557/&&&&& ")g c/o /355557/3)&&& ":3 c/o /":5557/"&&&& & / "0h c/o c555557c5)&&& "*5: c/o ch55557ch)&&& "*/5 c/o c55557c)&&& "0) c/o c5:5557c5&&&& "*50 c/o ch:5557ch&&&& "*/* c/o c:5557c&&&& "0: c/o c*55557c*)&&& "**5 c/o c)55557c))&&& "*// c/o c55557c)&&& "00 c/o c*:5557c*&&&& "*** c/o c):5557c)&&&& "*/c c/o c:5557c&&&& "*55 c/o c/55557c/)&&& "**/ c/o c:55557c:)&&& "*/g c/o c!55557c!)&&& "*5* c/o c/:5557c/&&&& "**c c/o c::5557c:&&&& "*/3 c/o c!:5557c!&&&& "*5/ c/o cc55557cc)&&& "**g c/o c055557c0)&&& "*/h c/o c&55557c&)&&& "*5c c/o cc:5557cc&&&& "**3 c/o c0:5557c0&&&& "*/) :o c&:5557c&0&&& "*5g c/o cg55557cg)&&& "**h c/o c "55557c")&&& "*/: :o c&"5557c&e&&& "*53 c/o cg:5557cg&&&& "**) c/o c":5557c"&&&& "*/0 :o c&5557c&&&& "*5h c/o c355557c3)&&& "**: c/o ce55557ce)&&& "*c5 :o c&!5557c&&&&& "*5) c/o c3:5557c3&&&& "**0 c/o ce:5557ce&&&& march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 33 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. ta b l e 1 0 . 7 sector address table, s29ns032j ' ' '* / ' ' '* / ' ' '* / & 2 "5 c/o 555555755)&&& "h c/o 5c555575c)&&& "** c/o 53:555753&&&& "* c/o 55:555755&&&& ") c/o 5c:55575c&&&& "*/ c/o 5h555575h)&&& "/ c/o 5*555575*)&&& ": c/o 5g555575g)&&& "*c c/o 5h:55575h&&&& "c c/o 5*:55575*&&&& "0 c/o 5g:55575g&&&& "*g c/o 5)555575))&&& "g c/o 5/555575/)&&& "*5 c/o 535555753)&&& "*3 c/o 5):55575)&&&& "3 c/o 5/:55575/&&&& & "*h c/o 5:555575:)&&& "// c/o 5e555575e)&&& "/) c/o 5:55575&&&& "*) c/o 5::55575:&&&& "/c c/o 5e:55575e&&&& "/: c/o 5!555575!)&&& "*: c/o 505555750)&&& "/g c/o 5555575)&&& "/0 c/o 5!:55575!&&&& "*0 c/o 50:555750&&&& "/3 c/o 5:55575&&&& "c5 c/o 5&555575&)&&& "/5 c/o 5"555575")&&& "/h c/o 5555575)&&& "c* c/o 5&:55575&&&&& "/* c/o 5":55575"&&&& & & "c/ c/o *555557*5)&&& "c: c/o *c55557*c)&&& "gc c/o *3:5557*3&&&& "cc c/o *5:5557*5&&&& "c0 c/o *c:5557*c&&&& "gg c/o *h55557*h)&&& "cg c/o **55557**)&&& "g5 c/o *g55557*g)&&& "g3 c/o *h:5557*h&&&& "c3 c/o **:5557**&&&& "g* c/o *g:5557*g&&&& "gh c/o *)55557*))&&& "ch c/o */55557*/)&&& "g/ c/o *355557*3)&&& "g) c/o *):5557*)&&&& "c) c/o */:5557*/&&&& & / "g: c/o *:55557*:)&&& "33 c/o *e:5557*e&&&& "h* c/o *!:5557*!&&&& "g0 c/o *::5557*:&&&& "3h c/o *55557*)&&& "h/ c/o *&55557*&)&&& "35 c/o *055557*0)&&& "3) c/o *:5557*&&&& "hc :o *&:5557*&0&&& "3* c/o *0:5557*0&&&& "3: c/o *55557*)&&& "hg :o *&"5557*&e&&& "3/ c/o *"55557*")&&& "30 c/o *:5557*&&&& "h3 :o *&5557*&&&& "3c c/o *":5557*"&&&& "h5 c/o *!55557*!)&&& "hh :o *&!5557*&&&&& "3g c/o *e55557*e)&&& ta b l e 1 0 . 8 sector address table, s29ns016j ' ' '* / ' ' '* / ' ' '* / & 2 "5 c/o 555555755)&&& "c c/o 5*:55575*&&&& "h c/o 5c555575c)&&& "* c/o 55:555755&&&& "g c/o 5/555575/)&&& ") c/o 5c:55575c&&&& "/ c/o 5*555575*)&&& "3 c/o 5/:55575/&&&& & ": c/o 5g555575g)&&& "** c/o 53:555753&&&& "*g c/o 5)555575))&&& "0 c/o 5g:55575g&&&& "*/ c/o 5h555575h)&&& "*3 c/o 5):55575)&&&& "*5 c/o 535555753)&&& "*c c/o 5h:55575h&&&& & & "*h c/o 5:555575:)&&& "*0 c/o 50:555750&&&& "// c/o 5e555575e)&&& "*) c/o 5::55575:&&&& "/5 c/o 5"555575")&&& "/c c/o 5e:55575e&&&& "*: c/o 505555750)&&& "/* c/o 5":55575"&&&& & / "/g c/o 5555575)&&& "/: c/o 5!555575!)&&& "c/ :o 5&"55575&e&&& "/3 c/o 5:55575&&&& "/0 c/o 5!:55575!&&&& "cc :o 5&55575&&&& "/h c/o 5555575)&&& "c5 c/o 5&555575&)&&& "cg :o 5&!55575&&&&& "/) c/o 5:55575&&&& "c* :o 5&:55575&0&&& 34 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. 10.1 command definitions 6 ; *5*h ; 6 . h + " "?n" 6!n " 10.2 reading array data + ' ; ! + ! % ! ! " ! $ + + $ + + " ! $ 4 ! d! 1 + + a3 $ + 1 $ 1 ; " 1 ( ' +e 1 ; + e 1 ( e ( " 1 de 1 $ & *)/ & *)g 10.3 set configuration re gister command sequence ; + ; ; ( $ 5 *50 " "*)7 "*/ ' " 4 7 "*: ( v 4 5 4 # + ; $ $ 4 " ta b l e 1 0 . 9 burst mode & / a ' a ' 6!5> ( % 5>(% , " 55333 5*333 5/333 5c333 5g333 53333 :+ 5:333 50333 5"333 5e333 5333 5333 *h+ *5333 **333 */333 *c333 *g333 *3333 c/+ *:333 *0333 *"333 *e333 *333 *333 :+ /:333 /0333 /"333 /e333 /333 /333 *h+ c5333 c*333 c/333 cc333 cg333 c3333 c/+ c:333 c0333 c"333 ce333 c333 c333 march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 35 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. !6>! ) "*)7"*/ (((( ; 3ghh -@<$ $ *5*5 637-8#!$ - 89$ $$ : #"- #" 89; " ; 10.4 sector lock/unlock command sequence d ; + 6 $ $ d ; . v h5 $ " h5 $ "h "hk? # "hk? #@ " $ $ 4 ; &5 ' 6%n ? # "$ ? %% ? # q ? %% ? # $ 10.5 reset command 6 + + " v ; ; ( $ $ ; + ; # ; ! $ + + ( + $ $ ; + ; ( $ # ! $ + + #a3 $ + + ! ta b l e 1 0 . 1 0 wait states for handshaking / /#2e9 (6)* %(@,,)* # g 3 # 3 h # $ w h ) # $ w ) : 36 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. 10.6 autoselect command sequence ; $ *5*h ; ; + + ; + ; ; $ e" $ " # + + ! 10.7 program command sequence % + + ; + $ + 4$ ! % ; + *5*h ; ; 6 ! % $ + a)ahda/ 6 ( " ! % " ' ; $ % ; / 7 .. . " a3k*$ a) ah @ $ ( ( ( !6"5 ;& .. 'h ; ; $ /5 " + + ta b l e 1 0 . 1 1 autoselect device id 2 / 2 '5$'!5?c '5$'6,(c '5$'6>5c '5$'6!,c - # e" 955 555* #$6* e" 95* 55)! /))! /")! /0)! #$6/ e" 95! 55*h /)5/ /"/g /0*3 #$6c e" 95& 5555 /)55 /"55 /055 e dl " 9 5/ 555* $5555 1 # e" 95c e$e ' march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 37 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. ; ; ; $"5q + " ; ; $ *5*h ; + ; $ l e% l e1 + 4 $ + ; 05 55 ? %% 6 ? %% $ l e + l e ; + ? %% & *5* ! d% ( + " $ & *)h (8 5 figure 10.1 program operation 10.8 chip erase command sequence 4 ; $ + $ ! ! ; ! ! < ; + start write program command sequence data poll from system verify data? no yes last address? no yes programming completed increment address embedded program algorithm in progress 38 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. *5*h ; ; 6 ! ! $ + a)ahda/ 6 ( " @ $ 7 # $ ; $ & *5/ ! d% ( " $ & *)) 10.9 sector erase command sequence 4 ; + $ + $ $ *5*h ; ; ; ! ! + < ; " ; $ + !" + $ + ; $ !" $ " 4 + # + ! /.. ' d d ' .7 . ; ac ac. + ! + 6!n ; 6 ! ! $ + ' ! ! $ + a)ahda/ 6 ( ( $ ! " @ $ # $ ; $ & *5/ ! d% ( " $ & *)) march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 39 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. !6$! / ' 8 d l $ ; *5*/ . . !66. # $ c5t*58 l . * l d + ; " / " */ ? ? %% * s 4 c c 6 :5 g 6 *5 3 - a/daha) $b 6 ( h ? %% */?? ) 1 ; ta b l e 1 0 . 1 2 accelerated sector erase groups, s29ns128j "57") "g57"g) "::7"03 "*/57"*/) "*h57"*h) "*0/7"*00 "//g7"/c* ":7"*3 "g:7"33 ":57":) "*/:7"*c3 "*h:7"*)3 "/557"/5) "/c/7"/c0 "*h7"/c "3h7"hc "0h7"*5c "*ch7"*gc "*)h7"*:c "/5:7"/*3 "/g57"/g) "/g7"c* "hg7")* "*5g7"*** "*gg7"*3* "*:g7"*0* "/*h7"//c "/g:7"/3g "c/7"c0 ")/7")0 "**/7"**0 "*3/7"*30 ta b l e 1 0 . 1 3 accelerated sector erase groups, s29ns064j "57") "c/7"c0 "3h7"hc ":57":) "*5g7"*** ":7"*3 "g57"g) "hg7")* "::7"03 "**/7"**0 "*h7"/c "g:7"33 ")/7")0 "0h7"*5c "*/57"*/h "/g7"c* ta b l e 1 0 . 1 4 accelerated sector erase groups, s29ns032j "57"c "*h+"*0 "/:+"c* "g5+"gc "3/+"33 "g7") "/5+"/c "c/+"c3 "gg+"g) "3h7"30 ":7"** "/g+"/) "ch+"c0 "g:+"3* "h57"h/ "*/+"*3 ta b l e 1 0 . 1 5 accelerated sector erase groups, s29ns016j "57"* ":+"0 "*g+"*3 "/5+"/* "/h+"/) "/7"c "*5+"** "*h+"*) "/g+"/3 "/:+"/0 "g7"3 "*/+"*c "*:+"*0 "/g+"/3 "c5 "h7") 40 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. 10.10 erase suspend/erase resume commands ! $e5$ $ $ .. @ .. + ; $ !" + ; ! ! % + 6 ! $ + ; ! @ $ ! + $ + " $ + + + + + 1 + a)7a 5 a)$ah a/ $ + 6 ( " + $ + + a)ah $b 6 ( # + + $ ; " & " ; $ ! 1 + ; & 1 " ! march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 41 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. (8 5 ! )*#< figure 10.2 erase operation start write erase command sequence data poll from system data = ffh? no yes erasure completed embedded erase algorithm in progress 42 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. /,)0 , ),) 2 , 4 = =-$ > 2),) 2 ) 4 = = -$ > , > : ; % ' # 5 ? , : !!' ! !@a !7b- !' !( !@a (89b- !(' @ !@a (#!b- @' 7 !@a (8b; $ - - + , : ; 8, 8,( , c' ! @ ! > % # % 5 - $ 9 ) )*&')*7 0 5-% )2) & d $ - % ' ! 0 8 4 > $ 5 > $ $ > c a 5 $ 7 5 : > ;$ - )*& :$ > ; @ 5 > 3) 9-&- 8 - > 5 ( " !@a !7b- ((c " !@a (89b- ! cc " !@a (#!b- ! c " !@a (8b- !@c " !@a !7b- ((8" !@a (89b- !c(! - !@a (#!b- ! !9- !@a (8b- !@& ! " !@a !7b- ((((- !@a (89b- !c((- !@a (#!b- ! (( !@a (8b- !@(( # (((( ((( 9 ?)-a & d ? 5 5 5 8 d ? 5 $ c - -$ > - 5 7 > - 5 @ - c' !- $ 5 !( > $> $> ta b l e 1 0 . 1 6 command definitions .. 'h 1 3 & 1 ! i , 3 ' ': / 2 / 2 / 2 / 2 / 2 / 2 " 1 ) * 1" 1 1 : * mmm &5 " 0 - # g 333 "" /"" 33 e" 333 05 e" m55 555* # h 333 "" /"" 33 e" 333 05 e" m5* ' *5 e" m5! ' ** e" m5& ' */ ? *c g 333 "" /"" 33 " 333 05 " m5/ ' *c 1 # *g g 333 "" /"" 33 e" 333 05 e" m5c ' *g l e - ! c 333 "" /"" 33 333 /5 % *3 / mmm "5 %" % 1 *h / e" 05 mmm 55 % g 333 "" /"" 33 333 "5 %" % ! h 333 "" /"" 33 333 :5 333 "" /"" 33 333 *5 ! h 333 "" /"" 33 333 :5 333 "" /"" 33 " c5 ! *) * e" e5 ! 1 *: * e" c5 dl c mmm h5 mmm h5 " h5 1 *0 c 333 "" /"" 33 1 333 5 &#a /5 * 33 0: march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 43 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. 11 write operation status .a/$ ac$a3$ah$ a) **/ a) ah 11.1 dq7: data# polling n% $a)$ ! % ! $ ! n% 6!n ; ! % $ a) a)a) ! 6 ! % $ a) a) # $n% a) 4 + %% $ ! ! $n% ( a)6 ! ! $ ! $n% + a) a) " ; $ $ n% a) 4 "% $ # $ ! ! + $ @ $ a) $ , ! % ! $a) + ah7a5 ( ! (!n $ a) a) $ ! a)$ ah7a5 ? a)7a5 **/ n% a) & *** n% + & *)0 " n% 44 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. e ,e ) -> $ ) -> ! )*c > )*&, * )*c $ )*& figure 11.1 data# polling algorithm 11.2 rdy: ready 1p "da*37"da5 + 6 1p 1pk? (@ $ 6 1p + 1pk? ( $ 1p + + 4 4 # !nk(!nk? # $1p + + . q c! c& hg q ; h-@< 1p + 1p o # $1pk? (@ !n k? # (!nk? #@ $ 1p@+r !nk? #@ # + $ 1p # $1pk? (@ !nk? # $ 1p@+r !nk? #@ dq7 = data? yes no no dq5 = 1? no yes yes fail pass read dq7?dq0 addr = va read dq7?dq0 addr = va dq7 = data? start march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 45 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. 11.3 dq6: toggle bit i e# ah ! % ! $ ! e# $ 6!n ; $ + ! % ! $ + ah ' (!n 6 $ah " ; $ $ah 4 "% $ # $ ! ! $ + ah a/ + 6 $ ! ! $ah 6 ! $ah + @ $ a/ + " $ a) a).n% # $ah 4 %% ; $ ah + + $ ! + % . $ ah. e# + $ & *)*5 $ *** a/ ah 11.4 dq2: toggle bit ii ? 33 a/$ ah$ $ ! ! $ + e## 6!n ; a/ ' (!n e a/ + ah$ $ $ ! $ + $ ; 1 **/ a/ ah . $ ah. e# + $ & *)*5 $ *** a/ ah 46 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. > )*&, * )*& * )*8< ? 3 )*!< ? 33 figure 11.2 toggle bit algorithm table 11.1 dq6 and dq2 indications 0 . 2g, 2g5 $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ start no yes yes dq5 = 1? no yes dq6 = toggle? no read byte (dq0-dq7) address = va dq6 = toggle? read byte twice (dq 0-dq7) adrdess = va read byte (dq0-dq7) address = va fail pass march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 47 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. 11.5 reading toggle bits dq6/dq2 6 $ a)7a5 $ " $ + # $ a)7a5 @ $ $ + $ a3 a3.!4 #$ $ b a3 # $ # + $ $ a3 a3 + $ " $ # $ 11.6 dq5: exceeded timing limits a3 4 l a3 $ a3 + ( - l $ $ 4 $a3 + l $ + + + + 11.7 dq3: sector erase timer " ; $ ac # $ + 6 + $ac ( # !" $ ac"$ ! ; " $ a) n% + ah e# ; $ ac#ac $ ! ! q 4 + ! #ac ( $ $ + ac ; #ac $ **/ ac 48 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. )*&$ * $ 2 % % )*&< % + ! )*c)*! 5 > $ )*c<)=2 )*!< ? 33 # 4 $ - $ > $ > 9 : ;$ )1$ % ta b l e 1 1 . 2 write operation status ' 2g" 1 5 3 2g, 2g% 1 ! 3 2g> 2g5 1 5 3 - ! % " a)n 5 'd" ' ! ! " 5 5 * ! - ! 1 ' g ! * ' 5 'd" ' +! ! % a)n 5 'd" 'd" march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 49 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. 12 absolute maximum ratings 7h389*358 " % " 7h389*/38 ? 1 f $ "# #d( 4 ? %% ' * 753?? 953? ? ' * 753?9/3? ? %% ' / 753?9*/3? ( ' c *55 " )> 3fg '(&e) > - 3fg e '!(e !( > > e h(&e !( " ! % )> 3fg e h(&e) > > e h!(e !( " !! ! ) > e 22 '(&e) > -e 22 e '!(e !( " ! % ) > e 22 h!&e$ > h#&e !( # a ) 9 > % > i > > % > % % > figure 12.1 maximum negative overshoot waveform figure 12.2 maximum positive overshoot waveform 12.1 operating ranges " " 7/389:38 # ' # ? 9*)? ? 4 9*03? g $$ > /5 /5 950? /5 7/5? /5 /5 ? 9/5? /5 /5? 50 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. 13 dc characteristics 13.1 cmos compatible % 3 $ e ,e % ! 3 ! f .j-$ g =e 3. # 3 >$ 2 9 )> $ h8( 5 3 # & 73fg$ 8 a((ke 22 $ . 2 1 3 1 ! 3 : ; # # # ? #' k? ? $? k? 4 t* s" # ( ( ? (l k? ? $? k? 4 t* s" # e ? " e 1 3 !nk? # $(!nk? # /3 c5 " # * ? " " 1 / !nk? # $(!nk? #@ 3-@< */ *h " *-@< c3 3 " # / ? " 6 c !nk? # $(!nk? #@ $? %% k? #@ *3 g5 " # c ? g !nk? #@ $1!!nk? #@ 0g5s" # g ? 1 1!!nk? #$ ok? # 0g5s" # 3 ? " 1 6 6 !nk? # $(!nk? # g5 h5 " # %%6 " % h ? %% k*/? )*3 " # 6 3*5 # %%! " ! h ? %% k*/? )*3 " # ! 3*5 ? # # ? 753 5g ? ? #@ # @? ? 75g ? 95/ ? ? ( ( ? # ( k*55s"$? k? 5* ? ? (@ ( @? # (@ k7*55s"$? k? ? 75* ? ? # ? " % **3 */3 ? ? o( ? + ? *5 *g ? march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 51 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. 14 test conditions figure 14.1 test setup 15 key to switching waveforms 16 switching waveforms figure 16.1 input waveforms and measurement levels table 14.1 test specifications /' ; ( $ b c5 & # 1 & 3 # % 557? ? # ? d/ ? ( ? d/ ? a . 0 - @ @ v $" % $ l '" @ # @r l v cc 0.0 v output measurement level input v cc /2 v cc /2 52 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. 17 ac characteristics 17.1 v cc power-up figure 17.1 v cc power-up diagram 17.2 clk characterization figure 17.1 clk characterization . 2 ' ' ; ? ? - 35 s 1@ 1!!n @ - 35 s . 2 6 1,,)*3 69 1%()*3 ; o o& ; -4 hh 3g -@< o o% - *3 *:3 @ o@ - c3 g3 o 1 o1 -4 c c & o& v cc reset# t vcs t rsth t clk t cl t ch t cr t cf clk march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 53 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. 17.3 synchronous/burst read a((k " $ > ! 3 89$ -$ )1 figure 17.2 burst mode read (66 and 54 mhz) . 2 6 1,,)*3 69 1%()*3 ; cd2d ' #" # " -4 )* :)3 e" e " ? ( -4 ** *c3 "? "?n o - g 3 "?@ "?n@ o - h ) "?( "?n@(!n - 5 " " o - g 3 "@ " @ o - h ) e@ @ ' 4 ' - c (! ( ! $%$1p? -4 ** *c3 !r ! @r -4 *5 (!r ( ! @r -4 *5 ! !n o - g 3 1p 1p o - g 3 1" 1 o -4 ** *c3 da da + 1 da + 2 da + n oe# a/dq15 ? a/dq0 a max ? a16 aa avd# rdy clk ce# t ces t acs t avds t avdh t avdo t ach t bacc t racc t oe t oez t cez t iacc t ryds t bdh aa 5 cycles for initial access shown. programmable wait state function is set to 03h. 15.2 ns typ. (66 mhz) 18.5 ns typ. (54 mhz) hi- z hi-z hi- z 54 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. " $ ! 3 89$ -$ - )1 figure 17.3 burst mode read (40 mhz) 17.4 asynchronous read a((k . 2 6 1,,)*3 69 1%()*3 ; cd2d ' ! " !n -4 h3 )5 " " " -4 h3 )5 "?% "?n - ** */ ""? " 1 ! "? - g 3 ""?@ " @ 1 ! "? - h ) (! ( ! ( ? -4 ** *c3 (!@ ( ! @ 1 - 5 n% - *5 (!r ( ! @r ' -4 *5 da da + 1 da + 2 da + n oe# a/dq15 ? a/dq0 a max ? a16 aa avd# rdy clk ce# t ces t acs t avds t avdh t avdo t ach t bacc t oe t oez t cez t iacc t bdh aa 4 cycles for initial access shown. programmable wait state function is set to 02h. 25 ns typ. t racc hi-z hi- z hi- z t ryds march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 55 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. , -),) figure 17.4 asynchronous mode read 17.5 hardware reset (reset#) a((k figure 17.5 reset timings . 2 /' - ; cd2d ' 1 1!!n% ! " 1 - ' -4 c3 s 1 1!!n% '( ! " 1 - ' -4 355 1% 1!!n% 6 - 355 1@ 1 @ e 1 ' - /55 1% 1!!n - - /5 s t ce we# a max ? a16 ce# oe# valid rd t acc t oeh t oe a/dq15 ? a/dq0 t oez t aavdh t avdp t aavds avd# ra ra reset# t rp t ready reset timings not during embedded algorithms t ready ce#, oe# t rh ce#, oe# reset timings during embedded algorithms reset# t rp 56 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. 17.6 erase/program operations a((k ! 2 2 # ) 2 ,2 -2),2 )- e ,e ! # # % ' 8 0 5 figure 17.6 program operation timings . 2 6 1,,)*3 69 1%()*3 ; cd2d ' "?"? 6 6 ' * - g3:5 "?6 " " - g 3 6"m "@ " @ - h ) "?% "?n - ** */ ?6@ - /3 g3 6@m @ @ - 5 f@6 f@6 1 1 e 6 5 !6 !n 5 6@!@ @ !n@ 5 66@ 6% d 61 6 % 6 /3 35 6@6 6%@ 6 % 6@ /5 c5 1d6 e 1 6 ( - 5 ?%% ? %% 1 & - 355 ?% ? %% " % - * s ? ? - 35 s !" ! " + -4 35 s ! ! -4 c3 s "% % *55 s %% % 6 % * s oe# ce# a/dq15 ? a/dq0 a max ? a16 avd# we# clk v cc 555h a0h pd t as t wp t ah t wc t wph pa pa t vcs t cs t dh t ch in progress t whwh1 va va complete va va program command sequence (last two cycles) read status data t ds v ih v il t avdp march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 57 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. ! % ' 8 0 5 figure 17.7 chip/sector erase operations e 22 5 ! d > figure 17.8 accelerated unlock bypass programming timing oe# ce# a/dq15 ? a/dq0 a max ? a16 avd# we# clk v cc 2aah 55h 30h t as t wp t ah t wc t wph sa sa t vcs t cs t dh t ch in progress t whwh2 va va complete va va erase command sequence (last two cycles) read status data t ds 10h for chip erase 555h for chip erase v ih v il t avdp ce# avd# we# a max ? a16 a/dq15 ? a/dq0 ce# v pp don't care don't care a0h pa pa pd v id v il or v ih t vpp t vps 58 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. ! e ,e $ 5 4 -)=2 $ figure 17.9 data# polling timings (during embedded algorithm) ! e ,e $ 5 4 - $ figure 17.10 toggle bit timings (during embedded algorithm) we# ce# oe# high z t oe high z a max ? a16 a/dq15 ? a/dq0 avd# t oeh t ce t ch t oez t cez status data status data t acc va va va va we# ce# oe# high z t oe high z a max ? a16 a/dq15 ? a/dq0 avd# t oeh t ce t ch t oez t cez status data status data t acc va va va va march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 59 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. 7$ $8#!$ > )( $ figure 17.11 8-, 16-, and 32-word linear burst address wrap around %% )%% i % -8( )8( figure 17.12 latency with boundary crossing clk address (hex) d0 d1 d2 a/dq15 ? a/dq0 ce# address wraps back to beginning of address group. 39 39 3a 3b 3c 3d 3e 3f 38 initial access v il v ih avd# v il v ih d3 d4 d5 d6 d7 (stays low) v il oe# clk address (hex) c60 c61 c62 c63 c63 c63 c64 c65 c66 c67 d60 d61 d62 d63 d64 d65 d66 d6 7 (stays high) avd# rdy a/dq15 ? a/dq0 oe#, ce# (stays low) address boundary occurs every 64 words, beginning at address 00003fh: 00007fh, 0000bfh, etc. address 000000h is also a boundary crossing. 3c 3d 3e 3f 40 41 42 43 latency t racc v ih v il v ih v il 60 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. )> $ $ 2 4 figure 17.13 initial access at 3eh with address boundary latency 3 e) l+m -$ " $9( .j - 4 9 &a e) c8n figure 17.14 example of extended valid address reducing wait state usage clk avd# rdy address high-z a/dq15 ? a/dq0 oe# d0 d1 d2 device is programmable from 2 to 7 total cycles during initial access (here, programmable wait state function is set to 04h; 6 cycles total) 2 additional wait states if address is at boundary avd# low with clock present enables burst read mode address a max ? a16 t oe clk avd# rdy hi-z a/dq oe# ce# d0 d1 d2 t iacc t avdsm addresses march 17, 2005 s71ns-j-00_a0 s71ns128jc0 based mcp 61 advance information this document has not been approved. shar ing this document with non-spansion emplo yees violates qs9000/ts16949 requirements. ? $> + $ $ > figure 17.15 back-to-back read/write cycle timings oe# ce# we# t oeh a/dq15 ? a/dq0 a max ? a16 avd# pd/30h pa/sa aah 555h ra pa/sa t wc t ds t dh t rc t rc t oe t as t ah t acc t oeh t wp t ghwl t oez t wc t sr/w last cycle in program or sector erase command sequence read status (at least two cycles) in same bank and/or array data from other bank begin another write or program command sequence rd ra ra ra rd t wph 62 s71ns128jc0 based mcp s71ns-j-00_a0 march 17, 2005 advance information this document has not been approved. shar ing this document with non- spansion employees violates qs9000/ts16949 requirements. 18 erase and programming performance $ <!& -7ee -((-((( - ! d $ @(o-e ,ce--(((-((( # % 9 3 -$ (( & >> 5 % $ 5 (8 8 > ((-((( 19 device history . 1 ! 3 : 1 5 3 ; .. ! c/o 5g 3 !4 55 ' g :o 5/ 3 ! */:- *5: hg- 3g c/- /) *h- *c3 6% 0 /*5 s !4 ' 3 " 6% g */5 s % ' c */:- 0h /:: !4 ' 3 hg- g: *gg c/- /g )/ *h- */ ch " % */:- c/ 0h hg- *h g: c/- : /g *h- g */ " ! */:- 35 hg- /3 c/- */3 *h- h/3 2 & ' d: 1):3 l 1 3 /0'*/:, & hh-@r 5*/! # /0'*/:, ! hh-@< 5*/ ! 4 /0'*/:, ! 3g-@< 5** ! 4 /0'*/:, & % hh-@r 5*/* % /0'*/:, & % 3g-@< 5*** % /0'5hg, & ! hh-@r 5*/! # 1 /0'5hg, & ! 3g-@< 5**! # 1 /0'5hg, & % hh-@r 5*/* % /0'5hg, & % 3g-@< 5*** % /0'5c/, & ! 3g-@< 5**! # 1 /0'5c/, & % 3g-@< 5*** % /0'5*h, & ! 3g-@< 5**! # 1 /0'5*h, & % 3g-@< 5*** % publication number s71ns-j-00 revision a amendment 0 issue date march 17, 2005 cellularram type 2 64 megabit burst cellularram features ' + + # +# g # 2 *)5?7*03?? 2 *)5?7cc5?? a ./ ."6 & a / 2 & / 2 g$:$*h $ / 2 4 + < 2 # 1 .)5 2 # 1 ./5 9 7 . 2 " 1 x/3 " 2 # 1 x*3 " 2 # $ 1 xc3 " 2 1 x*3 " 2 .*/5s" general description 1"-y @+ $-( + $ & 1 d6 + 1"-% 1"- & $ 1"- + ; 1 d6 + e1 + 1"- & 11 1"- + 1"-+ < % %"1 1"- + 1 b 2 < + % + 11 64 cellularram type 2 s71ns-j-00_a0 march 17, 2005 advance information 20 functional block diagram " > - - figure 20.1 functional block diagram +m )e= e > $ 4 table 20.1 signal descriptions '. 2 hg-."i/*.5j # " # .# 1 6 " 1 6 e1 11 o # . < ; 6 $ o "?n o @ 1 6 % 1 " "?n # " ?.# " "?n 1 6 "?n 1 6 1! # 1 ! .6 1!@$6 11e1 !n # ! ." 6 !n@$ + (!n # ( ! .! 6 (!n@$ 6!n # 6 ! . 6 #6!n $ 6 en # e ! ai).5j len # l e ! ai*3.:j ai*3.5j # d( # d( 6 ( 6.% + 1 6 !n6 1 d6 6 6 6 6@+r !n@ ? % . *)?7*03? % ? a #d(% . *)?7cc5? % d ? ? ? a ? a 64m: a[21:0] input/ output mux and buffers control logic dram memory array ce# we# oe# clk adv# cre wait lb# ub# dq[7:0] dq[15:8 address decode logic refresh configuration register (rcr) bus configuration register (bcr) march 17, 2005 s71ns-j-00_a0 cellularram type 2 65 advance information +m . +$- - 4 - -)2) i > $ > ! 4 :?p(q; # 4+?=d?= :+$;-)*p&<(q 4 +?= -)*pc<(q 4 d?= -)*p&<7q 9 > >$ $> & 4> - f % 8 e 3a ,e * (ei> :$ ; > c )2) +m . +$- - 4 - -)2) i > $ > ! 4 :?p(q; # 4+?=d?= :+$;-)*p&<(q 4 +?= -)*pc<(q 4 d?= -)*p&<7q 9 > $ >$ $> & 4> - f % 8 e 3a ,e * (ei> :$ ; > c )2) 7 ? j :?p&q; table 20.2 bus operationsasynchronous mode 9j 1 ! 3 /2#e de -de ade d 9&e@;&e a 1 5 3 2gm!%6n 1 > 3 1 " m @ +r +( g 6 " m m +r +# g m m @ m m m @+r @+r 3 $ h '( # m m m m m +r m g $ h 1 " m @ @ m +r @+r % % + m m @ m m m m @+r @+r ) table 20.3 bus operationsburst mode 9j 1 ! 3 /2#e de -de ade d 9&e@ ;&e a 1 5 3 2gm!%6n 1 > 3 " 1 " m @ +r +( g " 6 " m m +r +# g m m @ m m m @+r @+r 3 $ h '( # m m m m m +r m g $ h # e 1 " m @ +r +( g $ : # e 6 " @ m +r +# g $ : e " @ m m m +r +# +( g $ : e " m m @ m m +r @+r g $ : 1 " @ @ m +r @+r : % % + m m @ m m m m @+r @+r ) 66 cellularram type 2 s71ns-j-00_a0 march 17, 2005 advance information 21 functional description 1"- % + 4 1 21.1 power-up initialization 1"- + + < # < e1 11 /g* /gg ? ? a 6 + *)?$ ; *35s + < < $!n @6 < $ + 1 figure 21.1 power-up initialization timing 22 bus operating modes 1"- & + $ $ $ 1 6 e1% 11i)j 22.1 asynchronous mode 1"- 1"- !n$(!n$6!n$endlen 1 & //* + !n$(!n$ endlen 6!n@? #d( 6 & /// !n$6!n$ endlen 6 $ (!n r $ 6!n (!n !n$6!n$endlen " "? $"? 1 d6 $ o @ $ 6 6!n !- v cc v cc q t pu > 150 s device initialization device ready for normal operation v cc = 1.7 v march 17, 2005 s71ns-j-00_a0 cellularram type 2 67 advance information )e +$ figure 22.1 read operation (adv# low) figure 22.2 write operation (adv# low) data valid address valid t rc = read cycle time ce# oe# we# address data lb#/ub# don't care data valid address valid t wc = write cycle time ce# oe# we# address data lb#/ub# don't care 68 cellularram type 2 s71ns-j-00_a0 march 17, 2005 advance information 22.2 page mode read operation % + 4 1 # + $ 1 $ b 1 ; + " "ic.5j *h+ 1"- " "igj 4 & //c % b 1 6 $ o @#f@(6+ + !n @ 6"# % 11i)j @"? 1 !n(6 !n (6 !- figure 22.3 page mode read operation (adv# low) 22.3 burst mode operation e @+ 1 6 e + + ; " !n $ 4 "?n $6!n 1 6!nk@$ & //g 6 6!nk $ & //3 < e1 4 &4 + $ $4 e1 1"- ce# oe# we# address data lb#/ub# don't care add[1] add[2] add[3] t aa d[0] t apa d[1] t apa d[2] t apa d[3] add[0] march 17, 2005 s71ns-j-00_a0 cellularram type 2 69 advance information 6"# !n (6$ + 6"# */:+ ( 1"- z 4 $6 & /)** $ e oo @ # $(!n @ 1"- q $(!n ' 6 $ 6 ; $(!n $ o !n !n !- !- # !n !- $!n @ !n d "?n a? <e i $: ;i4 >+$i4 figure 22.4 burst mode read (4-word burst) don't care undefined legend: latency code 2 (3 clocks), variable d[0] d[1] d[2] d[3] read burst identified (we# = high) clk a[22:0] adv# ce# oe# we# wait dq[15:0] lb#/ub# address valid 70 cellularram type 2 s71ns-j-00_a0 march 17, 2005 advance information a? <e i $: ;i4 >+$i4 figure 22.5 burst mode write (4-word burst) 22.4 mixed-mode operation 1 6 e1 6 + ; o @ ; "?n $ 6 + !n 4 + 4 ' o" 1 6 ; ; -4 + & & /)*0 $" 6 & e 1 22.5 wait operation 6 1"- $ + 6+ & //h 6 figure 22.6 wired or wait configuration address valid latency code 2 (3 clocks), variable write burst identified (we# = low) clk a[22:0] adv# ce# oe# we# wait dq[15:0] lb#/ub# d[0] d[1] d[2] d[3] don't care legend: cellularram external pull-up/ pull-down resistor processor ready other device wait other device wait wait march 17, 2005 s71ns-j-00_a0 cellularram type 2 71 advance information ( 1 6 $ 6 + 1"- ; &1 $6 &6 $6 1"- 6 6 + $ !n 6 6 6 e1i:jk* e !n@ 6 ' e1i:jk5$ 6 6 + $ $ 6 6"# 1 6 + # $ 6 & //) & //: 6 + $ 1 6 6 1 6 */:+ 6 $ + 22.6 lb#/ub# operation en len + 1 + $ a a @+r 1 6 $ 1"- + 6 $ !n$6!n$en$ len$ 6 en len @ $ " $ !n a? <+ $: ;i4 >+$i4 figure 22.7 refresh collision during read operation additional wait states inserted to allow refresh completion. clk a[22:0] adv# ce# oe# we# wait dq[15:0] lb#/ub# don't care undefine d legend: v ih v il v ih v il v ih v il v ih v il v ih v il v ih v il v ih v il high-z v oh v ol d[0] d[1] d[2] d[3] v oh v ol address valid 72 cellularram type 2 s71ns-j-00_a0 march 17, 2005 advance information a? <+ $: ;i4 >+$i4 figure 22.8 refresh collision during write operation 23 low-power operation 23.1 standby mode operation $ 1"- !n@ 1 6 $ 4 23.2 temperature compensated refresh 1 b + 1"- ; ; - ; ; + 1"- " 1 ; 9*3 $9g3 $9)5 $ 9:3 1"- & 4 $ 35 $ < )58 9*3 9g3 ; address valid additional wait states inserted to allow refresh completion. clk a[22:0] adv# ce# oe# we# wait dq[15:0] lb#/ub# don't car e legend: v ih v il v ih v il v ih v il v ih v il v ih v il v ih v il v ih v il high-z v oh v ol d[1] d[2] d[3] v oh v ol d[0] march 17, 2005 s71ns-j-00_a0 cellularram type 2 73 advance information 23.3 partial array refresh % %"1 ; $ +$ +; $ +; $ /g3 1 6 6 + $ + 11 23.4 deep power-down operation + % + ; 1"- " + % 6 + 11$ 1"- ; *35s < + *35s $ $ % 11 ; q 11 1! 74 cellularram type 2 s71ns-j-00_a0 march 17, 2005 advance information 24 configuration registers + e1 1"- & 11 1"- + $ + 24.1 access using cre 1! @ & /g/ 6 1! $ 1 6 + "i/*.5j# 6 $ "?n$!n$6!n$ qen len )0 e1 "i*0j@q 11 "i*0j p@q,+g4i p@q,.3s.? figure 24.1 configuration register write in asynchronous mode followed by read array operation a[21:0] (except a19) clk opcode address address data valid a19 1 adv# ce# oe# we# lb#/ub# dq[15:0] initiate control register access write address bus value to control register cre t avs t avh t avh t avs t vp t vph t cbph t wp t cw don?t care select control register march 17, 2005 s71ns-j-00_a0 cellularram type 2 75 advance information p@q,+$i p@q,. ? figure 24.2 configuration register write in synchronou s mode followed by read array operation 24.2 software access ; 1!" + 61#! ; ; 1!" 61#! & /gc + ; 4 1!" & /gg ' 1!" ; 1!" 61#! 1"- c&&&&&hg- q ; 1"- 61#! ; e1 11 # 5555$ ; 11q 555*$ ; e1 $ ; 1!+ + @ $ 1! # + $ 1! ? 1! ; 11 4% clk a[21:0] (except a19) a19 2 cre adv# ce# oe# we# lb#/ub# wait dq[15:0] t sp t sp t sp t hd t hd t hd t csp t sp t hd high-z don?t care opcode address high-z t cw latch control register value latch control register address t cbph 3 data valid address 76 cellularram type 2 s71ns-j-00_a0 march 17, 2005 advance information 43 = figure 24.3 load configuration register 43 = ! = .3s. &( figure 24.4 read configuration register address (max) address (max) address (max) xxxxh xxxxh rcr: 0000h bcr: 0001h cr value in address ce# oe# we# lb#/ub# da ta don't care read read write 1 write address (max) address (max) address (max) address (max) xxxxh xxxxh address ce# oe# we# lb#/ub# data don't care read read write 1 read rcr: 0000h bcr: 0001h note 2 address (max) cr value out march 17, 2005 s71ns-j-00_a0 cellularram type 2 77 advance information 24.3 bus configuration register e1 1"- % 11 /g* e1" + $ e1 0g& e1 1! "i*0j@$ ; ak555* 4 table 24.1 bus configuration register definition a13 0 latency counter 3 21 wait polarity 4 5 wait configuration (wc) clock configuration (cc) 6 7 8 output impedance burst wrap (bw)* 14 a12a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 0 1 operation mode synchronous burst access mode asynchronous access mode (default) bcr[12] bcr[11] latency counter bcr[13] 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 code 0?reserved code 1?reserved code 2 code 3 (default) code 4?reserved code 5?reserved code 6?reserved code 7?reserved 0 1 wait polarity active low active high (default) bcr[10] 0 1 wait configuration asserted during delay asserted one data cycle before delay (default) 0 1 output impedance full drive (default) 1/4 drive bcr[5] burst wrap (note 1) burst wraps within the burst length burst no wrap (default) bcr[3] bcr[1] bcr[0] burst length (note 1) bcr[2] 15 burst length (bl)* reserved reserved 9 10 reserved operating mode reserved 21?20 a14 a15 a[18:16] 0 1 register select select rcr select bcr must be set to "0" 19 18?16 register select reserved a19 a[21:20] reserved must be set to "0" must be set to "0" must be set to "0" must be set to "0" all must be set to "0" bcr[8] 0 1 clock configuration not supported rising edge (default) bcr[6] bcr[15] bcr[19] 0 1 0 0 0 1 0 1 1 1 1 0 1 1 4 words 8 words 16 words continuous burst (default) 13 12 11 78 cellularram type 2 s71ns-j-00_a0 march 17, 2005 advance information 5(>! & 91& m56n32 b & e 1 g$:$*h ; q + 555555 6 5(>5 & a 1& m>n32 ba + g+$:+$*h+ 1 ; # $ ; q 555555 table 24.2 sequence and burst length & a ' / (7a & 9 ?7a & 9 !,7a & 9 & & m>n a 12. 3 9 9 9 9 5p 0 0-1-2-3 0-1-2-3-4-5-6-7 0-1-2-3-4-5-6-7-8-9- 10-11-12-13-14-15 0-1-2-3- 4-5-6-? 1 1-2-3-0 1-2-3-4-5-6-7-0 1-2-3-4-5-6-7-8-9- 10-11-12-13-14-15-0 1-2-3-4- 5-6-7-? 2 2-3-0-1 2-3-4-5-6-7-0-1 2-3-4-5-6-7-8-9-10- 11-12-13-14-15-0-1 2-3-4-5- 6-7-8-? 3 3-0-1-2 3-4-5-6-7-0-1-2 3-4-5-6-7-8-9-10-11- 12-13-14-15-0-1-2 3-4-5-6- 7-8-9-? 4 4-5-6-7-0-1-2-3 4-5-6-7-8-9-10-11- 12-13-14-15-0-1-2-3 4-5-6-7- 8-9-10-? 5 5-6-7-0-1-2-3-4 5-6-7-8-9-10-11-12- 13-14-15-0-1-2-3-4 5-6-7-8- 9-10-11-? 6 6-7-0-1-2-3-4-5 6-7-8-9-10-11-12- 13-14-15-0-1-2-3-4-5 6-7-8-9- 10-11-12-? 7 7-0-1-2-3-4-5-6 7-8-9-10-11-12-13- 14-15-0-1-2-3-4-5-6 7-8-9-10- 11-12-13-? ??? 14 14-15-0-1-2-3-4-5- 6-7-8-9-10-11-12-13 14-15-16-17- 18-19-20-? 15 15-0-1-2-3-4-5-6-7- 8-9-10-11-12-13-14 15-16-17- 18-19-20-21? *' 0 0-1-2-3 0-1-2-3-4-5-6-7 0-1-2-3-4-5-6-7-8- 9-10-11-12-13-14-15 0-1-2-3 -4-5-6-? 1 1-2-3-4 1-2-3-4-5-6-7-8 1-2-3-4-5-6-7-8-9- 10-11-12-13-14-15-16 1-2-3-4- 5-6-7-? 2 2-3-4-5 2-3-4-5-6-7-8-9 2-3-4-5-6-7-8-9-10- 11-12-13-14-15-16-17 2-3-4-5- 6-7-8-? 3 3-4-5-6 3-4-5-6-7-8-9-10 3-4-5-6-7-8-9-10-11- 12-13-14-15-16-17-18 3-4-5-6- 7-8-9-? 4 4-5-6-7-8-9-10-11 4-5-6-7-8-9-10-11-12- 13-14-15-16-17-18-19 4-5-6-7- 8-9-10-? 5 5-6-7-8-9-10-11-12 5-6-7-8-9-10-11-12- 13- ?-15-16-17-18-19-20 5-6-7-8- 9-10-11? 6 6-7-8-9-10-11-12-13 6-7-8-9-10-11-12-13- 14- ?-16-17-18-19-20-21 6-7-8-9- 10-11-12? 7 7-8-9-10-11-12-13-14 7-8-9-10-11-12-13- 14- ?-17-18-19-20-21-22 7-8-9-10- 11-12-13? ??? 14 14-15-16-17-18-19-?- 23-24-25-26-27-28-29 14-15-16-17- 18-19-20-? 15 15-16-17-18-19-20-?- 24-25-26-27-28-29-30 15-16-17-18- 19-20-21-? march 17, 2005 s71ns-j-00_a0 cellularram type 2 79 advance information 5(>> - 0. 1& m%n32 b- ; 2 ' $ +$ +; b + &9 1"- + + < 1 ' 1"- ( 5(>( a 1& m?n32 ba -& 2 # @0 6 6 + 6 1 6 6 e1i:jk5$ 6 + $ & /g3 & /g) 6 ":k*$ 6 & /gh 5(>% a 1& m!6n32 ba / ) 6 6 @ 6 ; + + + )> f > 4 :?p7q,(; " !9c figure 24.5 wait configuration (bcr[8] = 0) e f > 4 :?p7q,; " !9c figure 24.6 wait configuration (bcr[8] = 1) data[0] data[1] high-z clk wait dq[15:0] data immediately valid (or invalid) data[0] high-z clk wait dq[15:0] data valid (or invalid) after one clock delay 80 cellularram type 2 s71ns-j-00_a0 march 17, 2005 advance information a? <4 >+$ figure 24.7 wait configuration during burst operation 5(>, 9 1& m!>!!n3 2 b 79 1 6 4 /gc & /g: $&( .j $ 2 figure 24.8 latency counter (variable initial latency, no refresh collision) 5(>" - 1& m!%n32 b/ - table 24.3 variable latency configuration codes 9 :0 h 1)*3 "6 @?6)* "6 @,,)* / c 3c *:)3 gg //) c g 2 :5 */3 hh *3/ d[0] d[1] d[2] d[3] d[4] clk wait wait dq[15:0] bcr[8] = 0 data valid in current cycle bcr[8] = 1 data valid in next cycle don't care legend: code 2 valid output valid output valid output valid output valid address valid output code 3 (default) valid output valid output valid output valid output v ih v il v ih v il v ih v il v oh v ol v oh v ol clk a[21:0] adv# a/dq[15:0] a/dq[15:0] don't care undefined legend: march 17, 2005 s71ns-j-00_a0 cellularram type 2 81 advance information 24.4 refresh configuration register 11 1"- + " % 11 /gg + 11" + $ 11 55)5 11 1! "i*0j $ + ; ak5555 5((! / 1 m5 6n32 b / %"1 ; $ +$ +; $ + ; $ + /g3 table 24.4 refresh configuration register mapping table 24.5 64mb address patterns for par (rcr[4] = 1) m5n m!n m6n / ' / ' '* 2 5 5 5 & 5555557c&&&&& g- 4*h hg- 5 5 * ( + 5555557/&&&&& /- 4*h c/- 5 * 5 ( +; 5555557*&&&&& *- 4*h *h- 5 * * ( + 55555575&&&&& 3*/o4*h :- * 5 5 ' 5 5- 4*h 5- * 5 * ( + *555557c&&&&& /- 4*h c/- * * 5 ( +; /555557c&&&&& *- 4*h *h- * * * ( + c555557c&&&&& 3*/o4*h :- par a4 a3 a2 a1 a0 read configuration register address bus a5 a6 all must be set to "0" 0 1 deep power-down dpd enable dpd disable (default) rcr[4] a[18:8] register select reserved reserved reserved tcr a[21:20] a19 0 1 register select select rcr select bcr rcr[19] all must be set to "0" rcr[1] rcr[0] refresh coverage rcr[2] 0 0 full array (default) 0 0 1 bottom 1/2 array 0 1 0 bottom 1/4 array 0 1 1 bottom 1/8 array 0 01 1 top 1/2 array 10 1 top 1/4 array dpd must be set to "0" a7 page 0 1 page mode enable/disable page mode disabled (default) page mode enable rcr[7] 4 51 2 30 6 18?8 19 21?20 7 1 none of array 00 1 top 3/4 array 11 rcr[6] rcr[5] maximum case temp +85oc (default) 11 00 01 10 +70oc +45oc +15oc 82 cellularram type 2 s71ns-j-00_a0 march 17, 2005 advance information 5((5 2 72 1 m(n32 b2 22 + + ; 1"- " % 6 + $ + 1"- ; *35s < + 11igjk5$ 11igj 5((> . . 1 m,%n32 b=?%o- 1 ; 9*3[$9g3[$ 9)5[$ 9:3[ + 1"- # 935[$ < 9)5[ 9*3[ 9g3[ ; 5((( - 1 m"n32 b2 1 # + $ march 17, 2005 s71ns-j-00_a0 cellularram type 2 83 advance information 25 absolute maximum ratings ? " e!4 ? $ ? a1 ? 7535? g5?? a 95c?$ ? ? 1 ? 75/?9/g3? ? ? a 1 ? 75/?9g5? 733[9*35[ ( 6 ' c5[9:3[ # 7g589:38 *5 9/h58 '#(o% 4 ( '!&o $ !4 4+ 4 84 cellularram type 2 s71ns-j-00_a0 march 17, 2005 advance information 26 dc characteristics 4 :!&tuuh7&t;i3 :9(tuuh7&t; ! 3 > e *h(e ! # 3 e (e ! 9 ?p&<9q,(( & $ > % 5 > % 8 3 ?: /;> $ 2 "d++ 1h7&o >+$ - > e * e " p8<&q,((:;- " !8 > ! >$ - > e * e 3 ? &(( $ - 2 # e 7& ((ke &9& table 26.1 electrical characteristics and operating conditions 2 '. : ; ? ? *)5 *03 ? #d( ? ? a 6.*:? *)5 cc5 ? # @? ? #@ *g ? a95/ ? / # ? ? # +5/5 5g ? c ( @? # (@ k+5/ " ? (@ 5:5? a? g ( ? # ( k95/ " ? ( 5/5? a? g # ? #' k5? a# # *s" ( (!nk? #@ # ( *s" - " 1 1 ? #' k? a5? ! $ #(lk5 # * +)5 /3 " 3 " % 1 +)5 *3 # " $e 1 ? #' k? a5? ! $ #(lk5 # * :5-@< c3 " 3 hh-@< c5 e 1 :5-@< *: hh-@< *3 e 6 ? #' k? a5? ! $# (l k5 # / :5-@< c3 " 3 hh-@< c5 ? #' k? a5? !nk? a # e hg- */5 s" h table 26.2 maximum standby currents for applying par and tcr settings / =!%p1 m,%nb!63 =(%p1 m,%nb6!3 =?%p1 m,%nb!!3 & " )5 :3 */5 *d/" h3 :5 **3 *dg" h5 )3 **5 *d:" 3) )5 *53 5"3533)5 march 17, 2005 s71ns-j-00_a0 cellularram type 2 85 advance information 3 ? 2 $ - figure 26.1 typical refresh current vs. temperature (i tcr ) table 26.3 deep power-down specifications 2 '. ; % + ? #' k? a5?q9/38 # rr *5 s" 0 10 20 30 40 50 60 70 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 temperature (c) i sb (a) par = 1/2 of array par = 1/4 of array par = 1/8 of array par = none of array par = full array 86 cellularram type 2 s71ns-j-00_a0 march 17, 2005 advance information 27 ac characteristics >e * e (3 :(k@(k;u8 ! 3 e f!) $e e * - $ # g e *f! figure 27.1 ac input/output reference waveform > > j ((k $ > :?p&q,(; figure 27.2 output load circuit table 27.1 capacitance 2 '. : ; # k9/3[qk*-@ d( |
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